Category Archives: LPDDR

Where does LPDDR3 SDRAM fit in the low-power memory universe? How about Wide I/O SDRAM?

Posted on March 22, 2012 by sleibson2

Marc Greenberg, Director of Product Marketing in the Cadence SoC Realization Design IP Group, just sent me some slides in connection with the recent introduction of the Cadence design and verification IP portfolio for LPDDR3 low-power SDRAM. I’ve already written … Continue reading →

Posted in DDR, DDR3, LPDDR, LPDDR2, LPDDR3, SDRAM, Wide I/O | Tagged , | 2 Comments

Upgrading your mobile or low-power SoC to LPDDR3? Got the right IP? You’ll need it to get maximum performance at minimum power

Posted on March 21, 2012 by sleibson2

LPDDR3 is JEDEC’s next click on the low-power LPDDR SDRAM standard for mobile, portable, and other low-power devices. According to the JEDEC Web site, the LPDDR3 standard is still in development but the technical specs of the early devices announced … Continue reading →

Posted in DDR, JEDEC, LPDDR, LPDDR2, LPDDR3, SDRAM | Tagged , , , | 1 Comment

Let’s start the new year with a bang! Elpida ships 4Gbit Wide I/O and LPDDR3 SDRAM samples

Posted on January 5, 2012 by sleibson2

Two DRAM categories that will shake up mobile product design this year are Wide I/O and LPDDR3. Elpida announced just at the end of the year that it has started shipping samples of 4Gbit SDRAMs with both interface types based … Continue reading →

Posted in LPDDR, LPDDR2, LPDDR3, Wide I/O | Tagged , , , , | 2 Comments