Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
What's hot on the Denali Memory Report?
- Compact Flash
- Hybrid Memory Cube
- NVM Express
- Wide I/O
Tag Archives: LPDDR
Want a quick and dirty overview of the new JEDEC LPDDR3 spec? EETimes serves it up
Kristin Lewotsky has just published an LPDDR3 SDRAM interview with Huong Vuong, Chairman of the JEDEC JC-42.6 Subcommittee for Low Power Memories. Here are the salient points from the interview, in my opinion: The purpose of LPDDR3 is to increase … Continue reading
Agilent: Memory technology has hit a wall due to physics limitations and that has implications for your designs
Last week, Agilent ran a seminar in Milpitas, California. The first of three subseminars was about memory technology with an excellent overview of the state of memory technology today. It was presented by Gordon Getty, an Agilent Application Engineer based … Continue reading
Let’s start the new year with a bang! Elpida ships 4Gbit Wide I/O and LPDDR3 SDRAM samples
Two DRAM categories that will shake up mobile product design this year are Wide I/O and LPDDR3. Elpida announced just at the end of the year that it has started shipping samples of 4Gbit SDRAMs with both interface types based … Continue reading