Two DRAM categories that will shake up mobile product design this year are Wide I/O and LPDDR3. Elpida announced just at the end of the year that it has started shipping samples of 4Gbit SDRAMs with both interface types based on the company’s 30nm process technology. (Just to be clear, both interface types are not, repeat not, available on one device. We’re talking two different next-generation SDRAM families here.)
The Wide I/O SDRAMs have four parallel, 128-bit interfaces that channel 12.8 Gbytes/sec into a host device with 200MHz interface clock speeds, which according to Elpida results in cutting power consumption in half compared to LPDDR2 SDRAMs.
The LPDDR3 interface spec doubles the transfer rate of LPDDR2 (the current SDRAM interface of choice for mobile, low-power designs) to 6.4 Gbytes/sec per device (with a 32-bit interface) while cutting power consumption by 25% (again, according to Elpida). Use two of these LPDDR3 devices in parallel and you’re up to 12.8 Gbytes/sec.
Elpida plans volume production for these devices in 2012 and both of these chips are destined for 2- and 4-layer 3D memory assemblies.
Note: For more information on Wide I/O SDRAMs, please see “3D Week: JEDEC Wide I/O Memory spec cleared for use.”
For more information on Cadence DRAM controller IP, click here.
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