Tag Archives: JEDEC

How ya gonna’ control that DDR4 SDRAM next year? The 28nm answer.

Cadence has just completed testing of its DDR4 SDRAM controller and PHY in two of the TSMC 28nm process technologies: 28HPM and 28HP. The DDR4 PHY exceeds the data rates needed to operate DDR-2400 SDRAMs and it is interoperable with … Continue reading

Posted in DDR, DDR3, DDR4, DRAM, LPDDR2, SDRAM | Tagged , , , , , , , | Leave a comment

Friday Video: A personal invitation to Memcon from Sanjay Srivastava

Want to know why you need to be at Memcon this year? Here’s Denali Software founder Sanjay Srivastava to tell you why: Now go and sign up! It’s a free ticket and includes breakfast, lunch, and some goodies—not to mention … Continue reading

Posted in DDR3, DDR4, DRAM, Flash, HMC, Hybrid Memory Cube, JEDEC, LPDDR2, LPDDR3, LPDDR4, Memcon, MRAM, mSATA, NAND, NOR, NVM Express, NVMe, ONFI, PCIe, Samsung, SAS, SATA, SD, SDRAM | Tagged , , , | Leave a comment

Test your system design for DDR4 JEDEC compliance with this $4500 ‘Scope add-on

Agilent has just announced a compliance test application for DDR4 SDRAM system designs. The $4500 Agilent N6462A DDR4 test application accelerates bring-up and debugging of DDR4 SDRAM-based systems by automating a bevy of physical-layer I/O testing with the company’s 9000 … Continue reading

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Save the date: JEDEC DDR4 Workshop, Santa Clara, CA. October 30-31

JEDEC is sponsoring a 2-day DDR4 workshop that should interest anyone planning on using DDR4 SDRAM in next-generation designs. Day 1: DDR4 vs DDR3: Comparison Matrix Why migrate to DDR4 Power-on, initialization, and training Read/Write and refresh operation review Day … Continue reading

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Want a quick and dirty overview of the new JEDEC LPDDR3 spec? EETimes serves it up

Kristin Lewotsky has just published an LPDDR3 SDRAM interview with Huong Vuong, Chairman of the JEDEC JC-42.6 Subcommittee for Low Power Memories. Here are the salient points from the interview, in my opinion: The purpose of LPDDR3 is to increase … Continue reading

Posted in LPDDR2, LPDDR3, LPDDR3E, LPDDR4, SDRAM | Tagged , , , , , , | Leave a comment

DFI 3.1 spec adds DDR4 and LPDDR3 coverage for speed and low-power benefits

Earlier this month, JEDEC published the LPDDR3 specification for the next generation of low-power SDRAM that will be used in mobile devices such as smartphones, tablets, ultra-thin notebooks and similar connected devices on the newest, high-speed 4G networks. The LPDDR3 … Continue reading

Posted in DDR, DDR4, DFI, JEDEC, LPDDR3 | Tagged , , , , | Leave a comment

Micron samples DDR4 module at 2400Mtransfers/sec. Production pegged in 2013

Micron has begun sampling a DDR4 SDRAM module, which the company has said will lead the way to DDR4 availability in production equipment starting in 2013. The memory chips on the Micron DDR4 module are 30nm, 4Gbit, x8 parts operating … Continue reading

Posted in DDR4, DRAM, JEDEC, SDRAM | Tagged , , , , , , | 2 Comments