Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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Recent Posts
- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
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Tag Archives: JEDEC
How ya gonna’ control that DDR4 SDRAM next year? The 28nm answer.
Cadence has just completed testing of its DDR4 SDRAM controller and PHY in two of the TSMC 28nm process technologies: 28HPM and 28HP. The DDR4 PHY exceeds the data rates needed to operate DDR-2400 SDRAMs and it is interoperable with … Continue reading
Posted in DDR, DDR3, DDR4, DRAM, LPDDR2, SDRAM
Tagged DDR3 SDRAM, DDR4 SDRAM, JEDEC, Micron, Micron Technology, Samsung, technology, TSMC
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Friday Video: A personal invitation to Memcon from Sanjay Srivastava
Want to know why you need to be at Memcon this year? Here’s Denali Software founder Sanjay Srivastava to tell you why: Now go and sign up! It’s a free ticket and includes breakfast, lunch, and some goodies—not to mention … Continue reading
Test your system design for DDR4 JEDEC compliance with this $4500 ‘Scope add-on
Agilent has just announced a compliance test application for DDR4 SDRAM system designs. The $4500 Agilent N6462A DDR4 test application accelerates bring-up and debugging of DDR4 SDRAM-based systems by automating a bevy of physical-layer I/O testing with the company’s 9000 … Continue reading
Posted in DDR, DDR4, DRAM, SDRAM
Tagged Agilent, Agilent Technologies, DDR4 SDRAM, JEDEC, Memcon, Oscilloscope
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Save the date: JEDEC DDR4 Workshop, Santa Clara, CA. October 30-31
JEDEC is sponsoring a 2-day DDR4 workshop that should interest anyone planning on using DDR4 SDRAM in next-generation designs. Day 1: DDR4 vs DDR3: Comparison Matrix Why migrate to DDR4 Power-on, initialization, and training Read/Write and refresh operation review Day … Continue reading
Want a quick and dirty overview of the new JEDEC LPDDR3 spec? EETimes serves it up
Kristin Lewotsky has just published an LPDDR3 SDRAM interview with Huong Vuong, Chairman of the JEDEC JC-42.6 Subcommittee for Low Power Memories. Here are the salient points from the interview, in my opinion: The purpose of LPDDR3 is to increase … Continue reading
DFI 3.1 spec adds DDR4 and LPDDR3 coverage for speed and low-power benefits
Earlier this month, JEDEC published the LPDDR3 specification for the next generation of low-power SDRAM that will be used in mobile devices such as smartphones, tablets, ultra-thin notebooks and similar connected devices on the newest, high-speed 4G networks. The LPDDR3 … Continue reading
Micron samples DDR4 module at 2400Mtransfers/sec. Production pegged in 2013
Micron has begun sampling a DDR4 SDRAM module, which the company has said will lead the way to DDR4 availability in production equipment starting in 2013. The memory chips on the Micron DDR4 module are 30nm, 4Gbit, x8 parts operating … Continue reading
Posted in DDR4, DRAM, JEDEC, SDRAM
Tagged DDR4 SDRAM, JEDEC, Micron, Micron Technology, Nanya, SDRAM, SO-DIMM
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Qualcomm’s Nick Yu says “3D DRAM stacking has started—it’s shipping in products… we need low-cost 3D IC assembly”
Today’s GSA Silicon Summit held at the Computer History Museum in Mountain View, California included a talk on 3D IC assembly by Nick Yu, VP of Engineering, VLSI Engineering, at Qualcomm. Yu is in charge of Qualcomm’s technology roadmaps including … Continue reading
Posted in 3D, DRAM, SDRAM, Wide I/O
Tagged Computer History Museum, GSM, Holy Grail, JEDEC, Qualcomm
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A possible roadmap for Wide I/O that leads to 2Tbps of SDRAM memory bandwidth—per device
Cadence Product Marketing Director Marc Greenberg—one of the speakers at last week’s EDPS conference held in Monterey, California—spoke about why the Wide I/O SDRAM is probably the “killer app” that unleashes 3D IC assembly into the mainstream. Richard Goering has … Continue reading
Posted in DDR, DDR3, DDR4, DRAM, SDRAM, Wide I/O
Tagged DDR SDRAM, Double data rate, JEDEC, Memory bandwidth, Wide I/O
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Upgrading your mobile or low-power SoC to LPDDR3? Got the right IP? You’ll need it to get maximum performance at minimum power
LPDDR3 is JEDEC’s next click on the low-power LPDDR SDRAM standard for mobile, portable, and other low-power devices. According to the JEDEC Web site, the LPDDR3 standard is still in development but the technical specs of the early devices announced … Continue reading
Is Wide I/O SDRAM a disruptive technology? Signs say yes according to new EETimes article
A new article about Wide I/O and 3D IC assembly published in EETimes brings some additional technical information to light. The article was written by Marc Greenberg and Samta Bansal, both from Cadence, and it contains both a review of … Continue reading
JEDEC to hold free server memory forum in Shenzen, March 1
Anyone involved in the development and use of server memory will want to consider the free server memory forum that JEDEC will be holding in Shenzen, China on March 1. Current agenda: Server memory roadmaps and trends DDR4 as enterprise … Continue reading
JEDEC Mobile Memory Summit: The pace quickens and memory standards must keep up
By Scott Jacobson CES hosted the JEDEC Mobile Memory Summit on January 12th to review the current state of the market for mobile semiconductor memory and to discuss future trends. It was a full day review of current mobile device … Continue reading
Posted in DRAM, eMMC, Flash, JEDEC, NAND, UFS
Tagged Feature Phone, Flash, JEDEC, LPDDR3 SDRAM, Mobile, MultiMediaCard, Smartphone, Universal Flash Storage
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Big week for Wide I/O: JEDEC publishes spec while Elpida ships sample 4Gbit parts
Wide I/O jumped closer to being a reality this week with two major announcements. On December 28th, Elpida announced that they were making sample shipments of 4Gbit Wide-IO. (See “Let’s start the new year with a bang! Elpida ships 4Gbit … Continue reading
Posted in JEDEC, LPDDR2, SDRAM, Wide I/O
Tagged Elpida, Elpida Memory, JEDEC, LPDDR2, SDRAM, ST-Ericsson, Wide I/O
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