Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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Recent Posts
- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
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Category Archives: 3D
Want to know why SK hynix is placing its bets on three different alternatives to DRAM and Flash?
Last week at the Flash Memory Summit, Dr. Sung Wook Park spoke about memory. No surprise there, but there were several surprises in Park’s presentation. The first surprise popped up in the slide immediately following the keynote presentation’s title slide: … Continue reading
Initial Hybrid Memory Cube short-reach interconnect specification issued to Consortium adopters
The Hybrid Memory Cube Consortium (HMCC), now supported by the three top DRAM vendors (Samsung, SK hynix, and Micron), has just issued an initial draft specification for the Hybrid Memory Cube’s “short-reach interconnection across physical layers”—in other words, the short-reach … Continue reading
Posted in 3D, DRAM, HMC, Hybrid Memory Cube, Hynix, Micron, Samsung
Tagged Hybrid Memory Cube, IBM, Micron, MicronTechnology, PHY, Samsung, SerDes
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Jim Handy, The Memory Guy, answers your questions about Flash memory
Two weeks ago, Jim Handy (who bills himself and appears on the Internet as “The Memory Guy”) posted a blog discussion about the end of Flash memory scaling. He also posted a notice of the blog as a discussion on … Continue reading
Posted in 3D, Flash, Memcon, ONFI
Tagged Charge Trap Flash, Flash, Flash memory, Jim Handy, LinkedIn, Memory Guy, Open NAND Flash Interface Working Group, Solid-state drive
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MOSAID and NOVACHIPS announce plans for an HLNAND-based SSD controller chip. Release set for 2013.
A couple of weeks ago, MOSAID and NOVACHIPS announced plans to jointly develop an SSD controller based on the MOSAID high-speed HLNAND interface specification. If you’re not familiar with the MOSAID HLNAND high-speed serial interface, join the club. Most NAND … Continue reading
Posted in 3D, Flash, Hybrid Memory Cube, NAND
Tagged Flash memory, Flash memory controller, HyperLink, MOSAID, NAND Flash, NOVACHIPS, PCI Express, Solid-state drive, SSD
1 Comment
Applied Materials develops Centura Avatar etcher for enabling 3D NAND Flash manufacture
About a year ago, I wrote an EDA360 Insider blog entry about 3D NAND Flash semiconductor memory. (See “3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron”) In this post, I discussed a talk by Glen … Continue reading
Jim Handy, The Memory Guy, writes that Flash memory is dead…but perhaps not just yet
My good friend Jim Handy—who writes several blogs including The Memory Guy and The SSD Guy—recently published a blog titled “The End of Flash Scaling.” He writes: “Everyone knows that flash memory is about to hit its scaling limit – … Continue reading
Posted in 3D, Flash, Memristor, MRAM, ReRAM, SSD
Tagged Flash, Flash memory, Flash memory controller, Hynix, NAND Flash, SSD
1 Comment
ARM, HP, and SK hynix join Hybrid Memory Cube Consortium (HMCC). First spec due by end of year
Add ARM, HP, and SK hynix to the growing list of companies in the Hybrid Memory Cube Consortium (HMCC). The three new members join the original founding companies, Micron and Samsung, along with Altera, IBM, Microsoft, Open-Silicon, and Xilinx plus … Continue reading
3D Thursday: Advantest 3D tester produces known good die and known good stacks
3D can’t move forward until the testability issues are solved. Hear that one? Well, Advantest has just advanced another click in that ratchet with this week’s introduction of a concept model test cell for TSV-based 2.5D and 3D products. It’s … Continue reading
Will SSDs be the first big market for 3D NAND Flash memories?
I’ve been meaning to write about a comment regarding NAND Flash memory and SSDs written by Thomas McCormick in LinkedIn’s Solid State Storage Group and this seems like the perfect time. McCormick is an Integrated Hardware/Software Product Development Leader at … Continue reading
Posted in 3D, DDR, DRAM, Flash, Memristor, MRAM, NAND, SSD, Storage
Tagged DRAM, Flash, Flash memory, memristor, MRAM, NAND Flash, Solid-state drive, SSD
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Invensas to detail POP interconnect to rival Wide I/O with as many as 1200 interconnections between IC packages
Later this week, Invensas will detail its new BVA (bond via array) package-on-package (POP) interconnect that can achieve 1200 electrical connections between chip packages without the use of 3D die assembly. Information on the technology will be contained in a … Continue reading
Posted in 3D, Wide I/O
Tagged 3D, Package on package, Surface-mount technology, Wide I/O
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Semiconductor memory plays a large role in smartphone design says Matti Floman of Nokia
“There’s no real difference between PCs and mobile phones today,” said Matti Floman from Nokia who gave the first keynote speech at last week’s JEDEC Mobile Forum. There is no difference in the types of applications run; there’s no difference … Continue reading
It’s Official: Microsoft joins 3D Hybrid Memory Cube Consortium with Micron, Samsung, Altera, IBM, Open-Silicon, and Xilinx
Last week, the Hybrid Memory Cube Consortium announced that Microsoft had joined Micron, Samsung, Altera, IBM, Open-Silicon, and Xilinx in the development of high-performance 3D SDRAM subsystems based on the Hybrid Memory Cube. For more information on the Hybrid Memory … Continue reading
Posted in 3D, DRAM, HMC, Hybrid Memory Cube
Tagged Altera, Hybrid Memory Cube, IBM, Micron, Microsoft, Open-Silicon, Samsung, Xilinx
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Simple three-bar graph explains all the engineering economics of 3D memory you need to know
The January IEEE Spectrum contained an article titled “3-D Chips Grow Up.” The article reproduced a simple Samsung bar graph about the very real advantages of 3D memory interconnect. That graph tells you all you need to know about why … Continue reading
Qualcomm’s Nick Yu says “3D DRAM stacking has started—it’s shipping in products… we need low-cost 3D IC assembly”
Today’s GSA Silicon Summit held at the Computer History Museum in Mountain View, California included a talk on 3D IC assembly by Nick Yu, VP of Engineering, VLSI Engineering, at Qualcomm. Yu is in charge of Qualcomm’s technology roadmaps including … Continue reading
Posted in 3D, DRAM, SDRAM, Wide I/O
Tagged Computer History Museum, GSM, Holy Grail, JEDEC, Qualcomm
1 Comment
Will your multicore SoC hit the memory wall? Will the memory wall hit your SoC? Does it matter?
Multicore SoC and processor designs were our solution to the death of Dennard Scaling when IC process geometries dropped below 90nm, when processor speeds hit 3GHz, and when processor power consumption went off the charts. Since 2004, we’ve transformed Moore’s … Continue reading
Posted in 3D, DDR, DDR3, DDR4, DRAM, Flash, PCIe, Wide I/O
Tagged DDR SDRAM, Graphics processing unit, System-on-a-chip, X86
9 Comments
Want some additional details about the Micron Hybrid Memory Cube?
This week at Design West (the conference previously known as the Embedded Systems Conference), I had a chance to speak with Mike Black from Micron about the Hybrid Memory Cube (HMC), a 3D DRAM assembly aimed at high-performance computing. The … Continue reading
Posted in 3D, DRAM, HMC, Hybrid Memory Cube
Tagged Altera, FPGA, HMC, Hybrid Memory Cube, IBM
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Agilent: Memory technology has hit a wall due to physics limitations and that has implications for your designs
Last week, Agilent ran a seminar in Milpitas, California. The first of three subseminars was about memory technology with an excellent overview of the state of memory technology today. It was presented by Gordon Getty, an Agilent Application Engineer based … Continue reading
DRAMeXchange opines on six major DRAM and NAND Flash trends for 2012-2015. What do you think?
The DRAMeXchange http://www.dramexchange.com/ keeps a very close watch on the spot and contract prices for all forms of semiconductor memory including DRAM and NAND Flash devices. The group also keeps an eye on trends that may affect pricing. A couple … Continue reading
Posted in 3D, DDR3, DDR4, DRAM, Flash, HDD, LPDDR2, LPDDR3, Memcon, ONFI, Toggle
Tagged DDR3 SDRAM, Flash, Flash memory, NAND Flash, PCI Express, Ultrabook
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More DDR4, DDR3, and 3D IC technical details from ISSCC, courtesy of memory analyst and expert Jim Handy
Semiconductor memory analyst and expert Jim Handy has just published an overview of some memory papers given at last week’s ISSCC. Handy’s article on the ElectroIQ web site supplements some of the previous Denali Memory Report blog entries published earlier … Continue reading
SanDisk’s founder and retired CEO Eli Harari says that the future of SSDs, computer memory, and everything else belongs to memristors at 11nm
The SSD Review reports that SanDisk’s founder and retired CEO Eli Harari delivered some explosive predictions at last week’s ISSCC in San Francisco. In sharp contrast to the recent and highly publicized paper predicting the slowdown of SSD speed and reliability … Continue reading
Is Wide I/O SDRAM a disruptive technology? Signs say yes according to new EETimes article
A new article about Wide I/O and 3D IC assembly published in EETimes brings some additional technical information to light. The article was written by Marc Greenberg and Samta Bansal, both from Cadence, and it contains both a review of … Continue reading
The sky is falling! The sky is falling! Paper predicts the bleak future of SSDs and NAND Flash memory
An interesting and disturbing paper titled “The Bleak Future of NAND Flash Memory” written by two researchers at the Department of Computer Science and Engineering at the University of California, San Diego, and one Microsoft employee uses current trends with … Continue reading
Is Wide I/O SDRAM free for the end user? (Republished from EDA360 Insider)
Note: I just published this blog entry on my EDA360 Insider blog for 3D Thursday but the topic is so relevant to the conversation in the Denali Memory Report that I am republishing it here as well. A recent email … Continue reading
Quickly Noted: EETimes on the challenges of testing semiconductor memory for mobile applications. Is testing really a 3D IC “stopper”?
Janine Love at EETimes interviewed Cecil Ho, President of CST (Simmtester.com)—a memory tester vendor, about issues surrounding the testing of semiconductor memory that’s optimized for and aimed at mobile applications. In these applications board real estate and physical volume are … Continue reading
Microprocessor Report names Micron Hybrid Memory Cube as “Best Microprocessor Technology” of the year
This week, Microprocessor Report selected the Micron Hybrid Memory Cube (HMC) as the “Best Microprocessor Technology” of 2011. Why? As Tom Halfhill writes: “Memory cubes promise greater density, lower latency, higher bandwidth, and better power efficiency per bit compared with … Continue reading
