Category Archives: Hybrid Memory Cube

What does Intel’s choice of GDDR5 graphics DRAM for main memory with its Manycore Xeon Phi coprocessor say about SoC design?

George Chrysos discussed the Intel MIC (Many Integrated Core) architecture of the Knights Bridge chip (officially called the Intel Xeon Phi coprocessor) at today’s Hot Chips 24 conference and disclosed that it uses GDDR5 graphics memory as the main memory … Continue reading

Posted in DDR, HMC, Hybrid Memory Cube, SDRAM | Tagged , , , , , | 1 Comment

Memcon is filling up. Register now to be sure you get a ticket. It’s free. September 18. Silicon Valley

The Flash Memory Summit took place this week and registration for next month’s Memcon in Silicon Valley suddenly took a big uptick. I’d like to suggest that if you want to be certain to attend Memcon next month, you might … Continue reading

Posted in DRAM, Flash, HMC, Hybrid Memory Cube | Tagged , , | Leave a comment

Friday Video: A personal invitation to Memcon from Sanjay Srivastava

Want to know why you need to be at Memcon this year? Here’s Denali Software founder Sanjay Srivastava to tell you why: Now go and sign up! It’s a free ticket and includes breakfast, lunch, and some goodies—not to mention … Continue reading

Posted in DDR3, DDR4, DRAM, Flash, HMC, Hybrid Memory Cube, JEDEC, LPDDR2, LPDDR3, LPDDR4, Memcon, MRAM, mSATA, NAND, NOR, NVM Express, NVMe, ONFI, PCIe, Samsung, SAS, SATA, SD, SDRAM | Tagged , , , | Leave a comment

Initial Hybrid Memory Cube short-reach interconnect specification issued to Consortium adopters

The Hybrid Memory Cube Consortium (HMCC), now supported by the three top DRAM vendors (Samsung, SK hynix, and Micron), has just issued an initial draft specification for the Hybrid Memory Cube’s “short-reach interconnection across physical layers”—in other words, the short-reach … Continue reading

Posted in 3D, DRAM, HMC, Hybrid Memory Cube, Hynix, Micron, Samsung | Tagged , , , , , , | Leave a comment

Want another opinion about the Hybrid Memory Cube? Michael Feldman of HPCwire.com weighs in

Michael Feldman over at HPCwire.com has just published his own analysis of the Hybrid Memory Cube (HMC), which I’ve covered extensively in the EDA360 Insider and the Denali Memory Report (see below). Feldman reiterates many of the same points I’ve … Continue reading

Posted in DDR, DRAM, HMC, Hybrid Memory Cube, Micron | Tagged , , , , , | Leave a comment

MOSAID and NOVACHIPS announce plans for an HLNAND-based SSD controller chip. Release set for 2013.

A couple of weeks ago, MOSAID and NOVACHIPS announced plans to jointly develop an SSD controller based on the MOSAID high-speed HLNAND interface specification. If you’re not familiar with the MOSAID HLNAND high-speed serial interface, join the club. Most NAND … Continue reading

Posted in 3D, Flash, Hybrid Memory Cube, NAND | Tagged , , , , , , , , | 1 Comment

ARM, HP, and SK hynix join Hybrid Memory Cube Consortium (HMCC). First spec due by end of year

Add ARM, HP, and SK hynix to the growing list of companies in the Hybrid Memory Cube Consortium (HMCC). The three new members join the original founding companies, Micron and Samsung, along with Altera, IBM, Microsoft, Open-Silicon, and Xilinx plus … Continue reading

Posted in 3D, DRAM, HMC, Hybrid Memory Cube, Hynix | Tagged , , , , , , | 1 Comment