Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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Recent Posts
- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
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Meta
Tag Archives: LPDDR2
Micron announces volume production of PCM/DRAM multichip packaged memory
Totally not expecting this. Today Micron announced high-volume availability of a multichip, packaged memory device that incorporates a 1Gbit PCM (Phase-Change Memory) and a 512Mbit LPDDR2 SDRAM. The PCM die is built with 45nm process technology. The multichip-packaged memory is … Continue reading
Want a quick and dirty overview of the new JEDEC LPDDR3 spec? EETimes serves it up
Kristin Lewotsky has just published an LPDDR3 SDRAM interview with Huong Vuong, Chairman of the JEDEC JC-42.6 Subcommittee for Low Power Memories. Here are the salient points from the interview, in my opinion: The purpose of LPDDR3 is to increase … Continue reading
Semiconductor memory plays a large role in smartphone design says Matti Floman of Nokia
“There’s no real difference between PCs and mobile phones today,” said Matti Floman from Nokia who gave the first keynote speech at last week’s JEDEC Mobile Forum. There is no difference in the types of applications run; there’s no difference … Continue reading
Agilent: Memory technology has hit a wall due to physics limitations and that has implications for your designs
Last week, Agilent ran a seminar in Milpitas, California. The first of three subseminars was about memory technology with an excellent overview of the state of memory technology today. It was presented by Gordon Getty, an Agilent Application Engineer based … Continue reading
Big week for Wide I/O: JEDEC publishes spec while Elpida ships sample 4Gbit parts
Wide I/O jumped closer to being a reality this week with two major announcements. On December 28th, Elpida announced that they were making sample shipments of 4Gbit Wide-IO. (See “Let’s start the new year with a bang! Elpida ships 4Gbit … Continue reading
Posted in JEDEC, LPDDR2, SDRAM, Wide I/O
Tagged Elpida, Elpida Memory, JEDEC, LPDDR2, SDRAM, ST-Ericsson, Wide I/O
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Let’s start the new year with a bang! Elpida ships 4Gbit Wide I/O and LPDDR3 SDRAM samples
Two DRAM categories that will shake up mobile product design this year are Wide I/O and LPDDR3. Elpida announced just at the end of the year that it has started shipping samples of 4Gbit SDRAMs with both interface types based … Continue reading
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