Category Archives: SRAM

Want to know why SK hynix is placing its bets on three different alternatives to DRAM and Flash?

Posted on August 27, 2012 by sleibson2

Last week at the Flash Memory Summit, Dr. Sung Wook Park spoke about memory. No surprise there, but there were several surprises in Park’s presentation. The first surprise popped up in the slide immediately following the keynote presentation’s title slide: … Continue reading →

Posted in 3D, DRAM, Flash, HDD, Hynix, Memristor, MRAM, NAND, PCM, ReRAM, SRAM, SSD | Tagged , , , , , , , | 3 Comments

Multicore, the Memory Wall, and Numerical Compression—FREE Webcast now available

Posted on May 1, 2012 by sleibson2

Last month I posted a review of Al Wegener’s terrific IEEE Computer Society presentation at Cadence titled “Multicore, the Memory Wall, and Numerical Compression.” (See “Will your multicore SoC hit the memory wall? Will the memory wall hit your SoC? … Continue reading →

Posted in DRAM, SDRAM, SRAM | Tagged , , , , | Leave a comment

Need fast, low-power, small, dual-ported embedded SRAM for your SoC designs? Memoir Systems Renaissance 2X memory compiler lets you pick all three: power, performance, and area

Posted on April 4, 2012 by sleibson2

SoC designers use a lot of on-chip dual-ported SRAM, typically as an interface buffer between two major logic blocks. IP startup Memoir Systems has just introduced four memory compilers that produce a range of dual-ported embedded SRAM blocks and these … Continue reading →

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