Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
Subscribe to Denali Memory Report!
-
Recent Posts
- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
Archives
What's hot on the Denali Memory Report?
Categories
- 3D
- ARM
- Compact Flash
- Cortex-A15
- DDR
- DDR3
- DDR4
- DFI
- DRAM
- eMMC
- Ethernet
- Exynos
- Flash
- HDD
- HMC
- Hybrid Memory Cube
- Hynix
- JEDEC
- LeCroy
- LPDDR
- LPDDR2
- LPDDR3
- LPDDR3E
- LPDDR4
- LRDIMM
- Marvell
- MCP
- Memcon
- Memristor
- Micron
- MLC
- MRAM
- mSATA
- NAND
- NOR
- NVM Express
- NVMe
- ONFI
- PCIe
- PCM
- QDR
- ReRAM
- Samsung
- SAS
- SATA
- SD
- SDRAM
- SLC
- SRAM
- SSD
- Storage
- Toggle
- UFS
- Uncategorized
- USB
- Wide I/O
- XQD
Meta
Tag Archives: SRAM
Need fast, low-power, small, dual-ported embedded SRAM for your SoC designs? Memoir Systems Renaissance 2X memory compiler lets you pick all three: power, performance, and area
SoC designers use a lot of on-chip dual-ported SRAM, typically as an interface buffer between two major logic blocks. IP startup Memoir Systems has just introduced four memory compilers that produce a range of dual-ported embedded SRAM blocks and these … Continue reading
Denali Memory Report 