Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
What's hot on the Denali Memory Report?
- Compact Flash
- Hybrid Memory Cube
- NVM Express
- Wide I/O
Tag Archives: ISSCC
SanDisk shows 128Gbit, 3-level cell NAND Flash memory chip at ISSCC. Is 20nm (or 19nm) here, so soon?
I’ve already written about retired SanDisk CEO Eli Harari’s ISSCC keynote prediction that ReRAM/memristor technology would supplant DRAM and NAND Flash memory by the time the 11nm process node arrives. (See “SanDisk’s founder and retired CEO Eli Harari says that … Continue reading
As reported this week by several Web sites including Techeye.net, Samsung and Hynix both demonstrated working prototypes of DDR4 SDRAM at the ISSCC conference in San Francisco this week. The Samsung and Hynix DDR4 memories were manufactured in 30nm and … Continue reading