Denali Memory Report:
The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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- Some great analysis on SSD wear leveling and power consumption
- The Economist covers PCM – must be something real
- Add OCZ to the growing list of SSD vendors differentiating their drives with a proprietary controller
- IDT announces DDR4 register chip for DDR4 registered DIMMs and 3D die stacks
- Western Digital sampling 5mm, 2.5-inch, 500Gbyte hybrid HDD with NAND Flash
What's hot on the Denali Memory Report?
- Compact Flash
- Hybrid Memory Cube
- NVM Express
- Wide I/O
Tag Archives: Error detection and correction
Flash memory endurance, multi-level cells, and process technology
I’ve been following an interesting discussion about Flash memory endurance, multi-level cells, and process technology in the LinkedIn Solid State Storage Group. Yesterday, The Memory Guy Jim Handy stepped in with this comment: “Flash endurance is the result of disruptions … Continue reading
Posted in Flash, NAND Tagged Error detection and correction, Flash, Flash memory, LinkedIn, MLC, Multi-level cell Leave a comment