Tag Archives: DDR3

Free Webinar on essential memory and storage verification IP: DDR3/4, LRDIMM, 12Gbps SAS, NVMe, Ethernet. April 10.

Verification IP (VIP) is an essential component of the development process for all ICs and systems and now you have the chance to listen to a free April 10 Webinar on applying that essential component in memory and storage applications. … Continue reading

Posted in DDR, DDR3, DDR4, DRAM, Ethernet, Flash, LRDIMM, NVM Express, NVMe, SAS | Tagged , , , , , | Leave a comment

Agilent: Memory technology has hit a wall due to physics limitations and that has implications for your designs

Last week, Agilent ran a seminar in Milpitas, California. The first of three subseminars was about memory technology with an excellent overview of the state of memory technology today. It was presented by Gordon Getty, an Agilent Application Engineer based … Continue reading

Posted in 3D, DDR3, DDR4, DRAM, eMMC, Flash, LPDDR2, LPDDR3, NAND, NOR, QDR, SD, SDRAM, Storage | Tagged , , , , , , , , , , , , | 1 Comment

Get the specifics of designing DDR3 SDRAM into a pcb with timing closure and good signal integrity

Next week at CDNLive!, EMA Design Automation will give a presentation on designing DDR3 SDRAM into a pcb with attention given to the signal integrity issues and timing closure. This session is one of seven pcb-specific sessions at CDNLive! on … Continue reading

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More DDR4, DDR3, and 3D IC technical details from ISSCC, courtesy of memory analyst and expert Jim Handy

Semiconductor memory analyst and expert Jim Handy has just published an overview of some memory papers given at last week’s ISSCC. Handy’s article on the ElectroIQ web site supplements some of the previous Denali Memory Report blog entries published earlier … Continue reading

Posted in 3D, DDR3, DDR4, DRAM, SDRAM | Tagged , , , , , , , , , | Leave a comment