Category Archives: Wide I/O

Is Wide I/O SDRAM a disruptive technology? Signs say yes according to new EETimes article

A new article about Wide I/O and 3D IC assembly published in EETimes brings some additional technical information to light. The article was written by Marc Greenberg and Samta Bansal, both from Cadence, and it contains both a review of … Continue reading

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Is Wide I/O SDRAM free for the end user? (Republished from EDA360 Insider)

Note: I just published this blog entry on my EDA360 Insider blog for 3D Thursday but the topic is so relevant to the conversation in the Denali Memory Report that I am republishing it here as well. A recent email … Continue reading

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Big week for Wide I/O: JEDEC publishes spec while Elpida ships sample 4Gbit parts

Wide I/O jumped closer to being a reality this week with two major announcements. On December 28th, Elpida announced that they were making sample shipments of 4Gbit Wide-IO. (See “Let’s start the new year with a bang! Elpida ships 4Gbit … Continue reading

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Let’s start the new year with a bang! Elpida ships 4Gbit Wide I/O and LPDDR3 SDRAM samples

Two DRAM categories that will shake up mobile product design this year are Wide I/O and LPDDR3. Elpida announced just at the end of the year that it has started shipping samples of 4Gbit SDRAMs with both interface types based … Continue reading

Posted in LPDDR, LPDDR2, LPDDR3, Wide I/O | Tagged , , , , | 2 Comments