About a year ago, I wrote an EDA360 Insider blog entry about 3D NAND Flash semiconductor memory. (See “3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron”) In this post, I discussed a talk by Glen Hawk, Vice President of the NAND Solutions Group at Micron, who spoke at last year’s Flash Memory Summit and who became excited when he started to discuss the possibility of 3D NAND Flash memory. At the time, I wrote:
“Process shrinks and the associated rising complexity of manufacture are not the only reasons to make a radical change, said Hawk. There’s perhaps an even bigger problem. At 20nm, he said, we’re storing the state of a cell using approximately 20 electrons. Every electron counts in this situation and it’s easy to see why NAND Flash retention times are eroding with each shrink. Lose 10 electrons in a 20nm NAND cell and you’ve lost a lot of signal/noise ratio.
The alternative that Micron is developing is a 3D NAND Flash cell stack, shown as an illustration on the right.”
And I’ve reproduced that image here.
The advantage of a 3D stacked NAND cell architecture, as I wrote previously, is:
“…each electron “trap site” is an annular ring surrounding a select line. That trap site stores 10,000 electrons, which gets NAND technology back to a safe area where there’s plenty of signal/noise margin and where retention time can go back to where it’s been. It’s analogous to the reprieve the semiconductor industry has gotten by switching semiconductor manufacture to high-K metal gate (HKMG) processing, which restored gate oxides to a realistic thickness after they’d gotten down to five or seven atomic layers—something far too delicate for mass manufacturing.”
Here’s an image of Micron’s early experiments with 3D NAND cell manufacture from Hawk’s presentation last year:
Note the tapering of the deeply etched holes for the gate trenches. That’s going to be important in a second.
At the time, Hawk predicted that the industry was two years away from production manufacturing of 3D NAND Flash memory.
Fast forward a year, to the present time.
Applied Materials has just announced that it has developed new plasma etching technology that can drill superior holes in silicon specifically for 3D structures such as the 3D NAND Flash memory cell Micron described a year ago. It’s called the Applied Centura Avatar Etch and it produces small, straight walls in deeply etched holes, as illustrated by this image from an Applied Materials presentation:
You can read more about this plasma etch technology in this Applied Materials blog and you can watch this video for an 8-minute description of the technology.