BIWIN America has just announced a “single-chip” SSD device employing the e-MMC interface. The device is available in capacities from 2 to 64Gbytes, all packed into a 169-ball BGA package measuring 12x20x1mm. An integral SSD controller provides built-in BCH error correction, wear leveling, and bad-block management. A power-on boot feature allows an embedded host CPU to access boot code without an upper-level software driver and an explicit sleep command allows the host controller to take direct control of the SSD’s sleep mode to improve system power efficiency. These new BIWIN SSDs are based on MLC (multi-level cell) NAND Flash devices and run on 1.8 or 3.3V.
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The Denali Memory Report is produced by Cadence Design Systems, Inc. It delivers memory market news, discussions of market trends, products and product strategies of the memory vendors, plus information about alliances and industry consortia.
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- Some great analysis on SSD wear leveling and power consumption
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What's hot on the Denali Memory Report?
- Compact Flash
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