SanDisk shows 128Gbit, 3-level cell NAND Flash memory chip at ISSCC. Is 20nm (or 19nm) here, so soon?

I’ve already written about retired SanDisk CEO Eli Harari’s ISSCC keynote prediction that ReRAM/memristor technology would supplant DRAM and NAND Flash memory by the time the 11nm process node arrives. (See “SanDisk’s founder and retired CEO Eli Harari says that the future of SSDs, computer memory, and everything else belongs to memristors at 11nm”) Well, there was another major revelation in Harari’s keynote speech. He showed SanDisk’s latest production NAND Flash device—developed jointly with Toshiba—a 128Gbit Flash memory that employs 3LC/TLC (three-level cell) storage. According to a post on www.techspot.com (“SanDisk 19nm 128Gb flash memory chip is world’s smallest”), SanDisk is using 19nm process technology.

If Harari’s prediction about ReRAM/memristors is correct NAND Flash’s dominance as the process driver of choice has one or two more process generations left. Previous process drivers have included DRAM, microprocessors, and FPGAs.

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About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at http://eda360insider.wordpress.com/)
This entry was posted in Flash, Memristor, NAND, ReRAM and tagged , , , , , , . Bookmark the permalink.

One Response to SanDisk shows 128Gbit, 3-level cell NAND Flash memory chip at ISSCC. Is 20nm (or 19nm) here, so soon?

  1. Pingback: More DDR4, DDR3, and 3D IC technical details from ISSCC, courtesy of memory analyst and expert Jim Handy | Denali Memory Report

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